Chenming Calvin Hu’s seminal work on MOS reliability and device modeling has had enormous impact on the continued scaling of electronic devices, enabling smaller yet more functional and higher-performance integrated circuits. Dr. Hu’s work has addressed reliability and scaling issues with models and simulation tools that are critical to current predictive capabilities in the semiconductor industry.
During the 1980s, Dr. Hu developed models capable of predicting circuit failures caused by hot electron effects, oxide breakdown and wearout, metal interconnect failure and the effects of external ionizing radiation. This led to the development of highly reliable integrated circuits. Dr. Hu led the team that created the FinFET, a promising MOSFET with a multiple-gate structure that will allow much smaller transistors to be built and has already enabled several corporations and universities to set records for designing the smallest transistor. Dr. Hu also contributed to the creation of the Berkley Short-Channel IGFET Model (BSIM) series of compact models, which most major chip manufacturers have made their preferred choice for circuit simulation. The research on transistor size reduction by Dr. Hu led to innovations such as variable threshold transistors, low-power flash memory cells, ultra-thin-body devices and multiple-gate structures.
An IEEE Fellow, Dr. Hu has co-authored three books, 800 research papers and supervised 60 doctoral students in the field of semiconductor technology. He served as TSMC’s Chief Technology Officer from 2001–2004 and is currently the TSMC Distinguished Professor of Microelectronics at the University of California, Berkeley.